DocumentCode :
242043
Title :
The influence of temperature on dynamic gate-bias stress instability in amorphous silicon thin film transistors
Author :
Wen Yu ; Wang, Lisa Ling ; Xiang Xiao ; Wenjie Li ; Shengdong Zhang
Author_Institution :
Shenzhen Grad. Sch., Peking Univ., Shenzhen, China
fYear :
2014
fDate :
28-31 Oct. 2014
Firstpage :
1
Lastpage :
3
Abstract :
Dynamic stress measurements were performed for a period of 12000 s on amorphous silicon (a-Si) thin-film transistors (TFTs) In order to investigate the influence of temperature on dynamic gate-bias stress instability, the tests were carried out at 40 °C, 70 °C and 100 °C respectively. The experimental results show that the performance of a-Si TFT is sensitive to the temperature. The electron de-trapping is dominant mechanism during the recovery phase at 40 °C, 70 °C. As temperature rises, the annealing of the defect states is enhanced. The influence of stress history on recovery is also discussed. On the whole, the temperature has great influence on instability of a-Si TFTs. Higher temperature cause worse subthreshold characteristics and accelerate the degradation of devices.
Keywords :
amorphous semiconductors; defect states; elemental semiconductors; semiconductor device reliability; silicon; thin film transistors; Si; a-Si thin-film transistors; amorphous silicon TFT; annealing; defect states; dynamic gate-bias stress instability; dynamic stress measurements; electron de-trapping; stress history; temperature 100 C; temperature 40 C; temperature 70 C; time 12000 s; Abstracts; Annealing; Degradation; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
Type :
conf
DOI :
10.1109/ICSICT.2014.7021448
Filename :
7021448
Link To Document :
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