Lifetime prediction of TFT integrated gate drivers

In this paper, we propose a method to predict the lifetime of TFT integrated gate driver circuits. Firstly, the failure analysis of the TFT circuit is performed and the maximum tolerable threshold voltage shift value (ΔV_TMAX) for the low-level-holding TFTs in the integrated circuit is determined by simulations with SMARAT-SPICE. Then the dependences of threshold voltage shift (ΔV_T) of TFTs on the gate bias stress are measured and the ΔV_T model parameters are extracted with the measured data using linear extrapolation. Results show the proposed approach is able to fast and accurately predict the lifetime of the TFT integrated gate drivers.