Hybrid nested Miller compensation with ing resistors

Author

Mita, R. ; Palumbo, G. ; Pennisi, S.

Author_Institution

Dipt. Elettrico Elettronico e Sistemistico, Catania Univ., Italy

Volume

1

fYear

2002

fDate

2002

Firstpage

177

Abstract

In this contribution we present an efficient design approach for the frequency compensation of four-stage amplifiers using the hybrid nested Miller technique. The method uses three ing resistors to remove the positive zeros introduced by the compensation capacitors. The proposed approach is useful in a low-voltage low-power design because it does not reduce the output swing and does not increase the power dissipation. SPICE simulations in excellent agreement with theoretical results, are also given.

Keywords

CMOS analogue integrated circuits; compensation; integrated circuit design; linear network synthesis; low-power electronics; operational amplifiers; poles and zeros; compensated amplifier; compensation capacitors; design procedure; double pole-zero cancellation; four-stage amplifiers; frequency compensation; hybrid nested Miller compensation; ing resistors; low-power design; low-voltage design; multistage amplifiers; op-amp design; positive zeros removal; Application specific integrated circuits; Capacitors; Frequency; Operational amplifiers; Poles and zeros; Power dissipation; Resistors; SPICE; Topology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2002. 9th International Conference on

Print_ISBN

0-7803-7596-3

Type

conf

DOI

10.1109/ICECS.2002.1045362

Filename

1045362