Electron mobility in silicon nanowire mosfets

An empirical model for the effective electron mobility in silicon nanowires (SiNWs) is presented that can be used for modeling and simulation purposes as well as for benchmarking SiNW technologies. The model is implemented into a commercial device simulator which is used to estimate the scaling trends of SiNW MOSFETs. The simulations predict a performance improvement down to a gate length of about 7nm. For smaller devices, no further benefit is expected due to the low electron mobility in SiNWs with diameters under 3nm.