DocumentCode :
2421906
Title :
The test vector problem and limitations to evolving digital circuits
Author :
Imamura, Kosuke ; Foster, James A. ; Krings, Axel W.
Author_Institution :
Dept. of Comput. Sci., Idaho Univ., Moscow, ID, USA
fYear :
2000
fDate :
2000
Firstpage :
75
Lastpage :
79
Abstract :
How do we know the correctness of an evolved circuit? While Evolutionary Hardware is exhibiting its effectiveness, we argue that it is very difficult to design a large-scale digital circuit by conventional evolutionary techniques alone, if we are using a subset of the entire truth table for fitness evaluation. The test vector generation problem for testing VLSI (Very Large Scale Integration) suggests that there is no efficient way to determine a training set which assures full correctness of an evolved circuit
Keywords :
VLSI; genetic algorithms; logic design; logic testing; VLSI; evolutionary techniques; evolving digital circuits; test vector generation problem; test vector problem; truth table; Application software; Circuit faults; Circuit testing; Computer science; Digital circuits; Evolutionary computation; Field programmable gate arrays; Hardware; Logic arrays; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Evolvable Hardware, 2000. Proceedings. The Second NASA/DoD Workshop on
Conference_Location :
Palo Alto, CA
Print_ISBN :
0-7695-0762-X
Type :
conf
DOI :
10.1109/EH.2000.869344
Filename :
869344
Link To Document :
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