Research on digital control design of high power middle frequency 400Hz inverter power

The device switching frequency is low and the output voltage fundamental frequency is high in high power middle frequency 400 Hz/115 V inverters, so the control bandwidth is limited and it is hard to promise a good waveform quality. The delay induced by the implementation of sampling, computing and PWM during digital control has bad impact on the system transient and steady state performances. In this paper, the cascaded topology with two H-bridge units which can get a higher equivalent switching frequency and reduce harmonic content in output voltage and P+resonant controller which can eliminate steady state error were adopted in a single-phase inverter. The delay resulting from the processes of sampling, computing and digital PWM was analyzed. The control parameters were designed in the continuous domain design by introduced an equivalent time delay. Finally, the discrete simulation on a single-phase 100 kVA, 400 Hz/115 V inverter model was presented, and the simulation verified the effectiveness of the proposed scheme.