• DocumentCode
    242383
  • Title

    Cost-effective amorphous silicon hard mask patterning sub-45nm contact trench

  • Author

    Lingkuan Meng ; Jianfeng Gao ; Xiaobin He ; Chunlong Li ; Jiang Yan

  • Author_Institution
    Instn. of Microelectron., Beijing, China
  • fYear
    2014
  • fDate
    28-31 Oct. 2014
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    A cost-effective process fabricating nanoscale SiO2 contact trench below 45nm was developed using amorphous silicon hard mask in a CCP etcher. When using both photo resist (PR) and α-Si hard mask to etch SiO2 layer, a typical problem of sidewall bowing was observed due to polymer accumulation on both sides of mask and effect of deviated ions from normal direction. It is more favorable using simple α-Si to etch SiO2 by an additional PR strip step. Finally, a slightly tapered contact trench has been achieved without visible sidewall bowing, which will be useful for metal filling in the trench.
  • Keywords
    etching; masks; photoresists; silicon compounds; CCP etcher; PR strip step; SiO2; cost-effective amorphous silicon hard mask patterning; metal filling; nanoscale contact trench; photoresist; polymer mulation; slightly tapered contact trench; Abstracts; CMOS integrated circuits; Fabrication; FinFETs; Logic gates; Resists; Strips;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4799-3296-2
  • Type

    conf

  • DOI
    10.1109/ICSICT.2014.7021617
  • Filename
    7021617