• DocumentCode
    2424744
  • Title

    Efficient processor allocation scheme for multi dimensional interconnection networks

  • Author

    Choo, Hyunseuiig ; Youn, Wee Yong ; Park, Gyung-Leen ; Shirazi, Behrooz

  • Author_Institution
    Dept. of Comput. Sci. Eng., Texas Univ., Arlington, TX, USA
  • fYear
    1997
  • fDate
    11-15 Aug 1997
  • Firstpage
    114
  • Lastpage
    117
  • Abstract
    The task scheduling policy and the processor allocation scheme affect the system performance significantly. In this paper, we propose an efficient processor allocation scheme for 3D mesh interconnection network with a simple FIFO scheduling policy. Complexity analysis shows that the allocation and deallocation of the scheme are O(LWH2) and O(LH), respectively, which are better than earlier schemes. Comprehensive computer simulation shows that the average allocation time of the proposed scheme is improved up to about 85% compared to the best earlier 3D approach
  • Keywords
    computational complexity; digital simulation; multiprocessor interconnection networks; processor scheduling; 3D mesh interconnection network; FIFO scheduling policy; complexity analysis; computer simulation; multidimensional interconnection networks; processor allocation scheme; system performance; task scheduling policy; Communications technology; Computer networks; Computer science; Computer simulation; Data structures; Hypercubes; Multiprocessor interconnection networks; Processor scheduling; System performance; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing, 1997., Proceedings of the 1997 International Conference on
  • Conference_Location
    Bloomington, IL
  • ISSN
    0190-3918
  • Print_ISBN
    0-8186-8108-X
  • Type

    conf

  • DOI
    10.1109/ICPP.1997.622570
  • Filename
    622570