DocumentCode
242513
Title
Design of a 800V VDMOS termination structure
Author
Kepang Wu ; Quanyuan Feng ; Xiaorong Gao ; Xiaopei Chen
Author_Institution
Inst. of Microelectron., Southwest Jiaotong Univ., Chengdu, China
fYear
2014
fDate
28-31 Oct. 2014
Firstpage
1
Lastpage
3
Abstract
The termination structure of 800 V VDMOS has been designed, which consists of the floating field limit ring and the filed plate to reduce the peak of the electric field and make it flat at the silicon surface. By the simulation, the breakdown-voltage 880 V has been achieved with 230 μm length termination structure, and the termination´s reliability has been improved owing to 2.4E+5 V*cm-1 of the maximum surface electric field. The process technology of this device is simple without additional masks and steps.
Keywords
MOS integrated circuits; electric fields; integrated circuit design; integrated circuit reliability; power MOSFET; VDMOS termination structure design; filed plate; floating field limit ring; maximum surface electric field; power MOSFET; process technology; size 230 mum; termination reliability; voltage 800 V; voltage 880 V; Abstracts; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4799-3296-2
Type
conf
DOI
10.1109/ICSICT.2014.7021680
Filename
7021680
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