DocumentCode :
242518
Title :
TCAD simulation of gate-enclosed MOSFET for terahertz detector
Author :
Yingjie Zhu ; Xiaoli Ji ; Yiming Liao ; Fuwei Wu ; Feng Yan
Author_Institution :
Sch. of Electron. Sci. & Technol., Nanjing Univ., Nanjing, China
fYear :
2014
fDate :
28-31 Oct. 2014
Firstpage :
1
Lastpage :
3
Abstract :
The source parasitic capacitor significantly influences the terahertz responsivity for CMOS terahertz detector. In this paper, the gate-enclosed MOSFET is used for terahertz signal detection in order to reduce the source parasitic capacitor. 3D-TCAD simulation reveals that the gate-enclosed structure improves the voltage responsivity (Rv) of the THz detectors and reduces noise-equivalent power (NEP) effectively by comparing with the equal conventional MOSFET detectors. A maximum Rv of 3 kV/W and a minimum NEP of 42pW/√Hz are achieved for the gate-enclosed nMOSFETs implemented in 0.18μm CMOS technology.
Keywords :
CMOS integrated circuits; MOSFET; technology CAD (electronics); terahertz wave detectors; 3D-TCAD simulation; CMOS terahertz detector; NEP; THz detector; complementary metal-oxide-semiconductor; gate-enclosed MOSFET; metal-oxide-semiconductor field-effect transistor; noise-equivalent power; size 0.18 mum; source parasitic capacitor; technology computer aided design; terahertz responsivity; terahertz signal detection; voltage responsivity; Abstracts; CMOS integrated circuits; CMOS technology; Detectors; Educational institutions; Logic gates; MOSFET;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
Type :
conf
DOI :
10.1109/ICSICT.2014.7021683
Filename :
7021683
Link To Document :
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