Comparison of high efficiency low output voltage forward topologies

Author

Cobos, J.A. ; García, O. ; Uceda, J. ; Sebastian, J. ; de la Cruz, E.

Author_Institution

DIE, Univ. Politecnica de Madrid, Spain

fYear

1994

fDate

20-25 Jun 1994

Firstpage

887

Abstract

The main goal in the design of on board converters for distributed power architectures is size minimization, with power losses being the main constraint to achieve this objective. Very high efficiency has been obtained in this work in low output voltage (3.3 V) forward topologies, thanks to the use of self-driven synchronous rectification. Forward PWM topology with active clamp (FAC), forward with resonant reset (FRR) and forward with multiresonant switch ZVS-MRC are compared in this paper from the point of view of efficiency, switching frequency, losses in the synchronous rectifiers, transformer demagnetization, semiconductor stresses and EMI

Keywords

PWM power convertors; demagnetisation; electromagnetic interference; losses; rectification; rectifiers; rectifying circuits; resonant power convertors; switching circuits; transformers; 3.3 V; EMI; active clamp; distributed power architectures; forward PWM topology; forward topologies; forward with multiresonant switch ZVS-MRC topolgy; forward with resonant reset topology; high efficiency; low output voltage; on board converters; power losses; self-driven synchronous rectification; semiconductor stresses; size minimization; switching frequency; synchronous rectifiers; transformer demagnetization; Clamps; Demagnetization; Low voltage; Pulse width modulation; Rectifiers; Resonance; Stress; Switches; Switching frequency; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Specialists Conference, PESC '94 Record., 25th Annual IEEE

Conference_Location

Taipei

Print_ISBN

0-7803-1859-5

Type

conf

DOI

10.1109/PESC.1994.373784

Filename

373784