Test time reduction using parallel RF test techniques

Wireless connectivity SOCs integrate multi-band radios on a single chip. Examples include WLAN 802.11 ("A" band or "BG" band), Bluetooth, Global Positioning System (GPS) and FM (Frequency Modulation) transmitters and receivers. It has been observed the cost of testing these RF components constitutes about 40% of the total cost of testing such an SOC. Reduction of this test cost is, therefore, important. The usage of multiple radios on a single chip provides the option of testing all of them concurrently. The unique functionality and different frequency bands of these radio modules however, prevent blind (unconstrained) parallelism, something which is ubiquitously possible for digital logic and memory modules. Additionally, the ability to test multiple dies in parallel (multi-site testing) and the ability to adopt low-cost tester platforms must also be considered. In this presentation, a case study of a complex SOC with four such radio modules is presented. It is shown how their concurrent test can be planned, together with high levels of multi-site with a low-cost tester platform. Various considerations and tradeoffs in the adoption of this solution are discussed, keeping in mind co-existence and coupling issues when these radios operate in parallel. The software BIST solution (where firmware is executed on a host processor inside the RF module) used to enable such concurrency is also explained, together with the design support required.