DocumentCode :
2426547
Title :
Bit line coupling memory tests for single-cell fails in SRAMs
Author :
Irobi, Sandra ; AL-Ars, Zaid ; Hamdioui, Said
Author_Institution :
CE Lab., Delft Univ. of Technol., Delft, Netherlands
fYear :
2010
fDate :
19-22 April 2010
Firstpage :
27
Lastpage :
32
Abstract :
Due to the decreasing dimensions of manufactured devices, the effect of bit line capacitive coupling on the behavior of faulty memory cells cannot be ignored. Neighboring cells influence the faulty behavior of defective cells through coupling. This paper analyzes and validates this behavior theoretically and through electrical simulations. The paper evaluates the impact of bit line coupling in SRAMs on cell faulty behavior and identifies necessary conditions to induce worst-case coupling effects. We present a test that guarantees detecting all single-cell static faults in the presence of capacitive coupling and worst-case neighborhood data for any possible open defect.
Keywords :
SRAM chips; coupled circuits; fault diagnosis; integrated circuit testing; SRAM; bit line capacitive coupling memory tests; defective cells; fault behavior; faulty memory cells; worst-case coupling effects; Analytical models; Circuit faults; Crosstalk; Electrical fault detection; Fault diagnosis; Parasitic capacitance; Predictive models; Random access memory; Semiconductor device noise; Testing; Memory tests; SRAM; bit line coupling; open defects; parasitic capacitance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium (VTS), 2010 28th
Conference_Location :
Santa Cruz, CA
ISSN :
1093-0167
Print_ISBN :
978-1-4244-6649-8
Type :
conf
DOI :
10.1109/VTS.2010.5469624
Filename :
5469624
Link To Document :
بازگشت