Title :
ASCOMA: an adaptive hybrid shared memory architecture
Author :
Kuo, Chen-Chi ; Carter, John ; Kuramkote, Ravindra ; Swanson, Mark
Author_Institution :
Dept. of Comput. Sci., Utah Univ., Salt Lake City, UT, USA
Abstract :
Scalable shared memory multiprocessors traditionally use either a cache coherent non-uniform memory access (CC-NUMA) or simple cache-only memory architecture (S-COMA) memory architecture. Recently, hybrid architectures that combine aspects of both CC-NUMA and S-COMA have emerged. We present two improvements over other hybrid architectures. The first improvement is a page allocation algorithm that prefers S-COMA pages at low memory pressures. Once the local free page pool is drained, additional pages are mapped in CC-NUMA mode until they suffer sufficient remote misses to warrant upgrading to S-COMA mode. The second improvement is a page replacement algorithm that dynamically backs off the rate of page remappings from CC-NUMA to S-COMA mode at high memory pressure. This design dramatically reduces the amount of kernel overhead and the number of induced cold misses caused by needless thrashing of the page cache. The resulting hybrid architecture is called adaptive S-COMA (AS-COMA). AS-COMA exploits the best of S-COMA and CC-NUMA, performing like an S-COMA machine at low memory pressure and like a CC-NUMA machine at high memory pressure. AS-COMA outperforms CC-NUMA under almost all conditions, and outperforms other hybrid architectures by up to 17% at low memory pressure and up to 90% at high memory pressure
Keywords :
cache storage; memory architecture; shared memory systems; storage allocation; storage management; AS-COMA; ASCOMA; CC-NUMA; S-COMA; adaptive S-COMA; adaptive hybrid shared memory architecture; cache coherent non-uniform memory access; high memory pressure; induced cold misses; kernel overhead; local free page pool; page allocation algorithm; page remappings; page replacement algorithm; remote misses; scalable shared memory multiprocessors; simple cache-only memory architecture; Cities and towns; Computer science; Delay; Electronic switching systems; Hardware; Memory architecture; Memory management; Programming profession; Random access memory; Read only memory;
Conference_Titel :
Parallel Processing, 1998. Proceedings. 1998 International Conference on
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-8186-8650-2
DOI :
10.1109/ICPP.1998.708488