Title :
Performance Evaluation of Different Hardware Models of RC5 Algorithm
Author :
Elkeelany, Omar ; Nimmagadda, Suman
Author_Institution :
Dept. of Electr. & Comput. Eng., Tennessee Technol. Univ., Cookeville, TN
Abstract :
Nowadays transmitting data securely over a network is gaining more and more importance and is triggering a need for an improvement in performance of the encryption algorithms. Even though the software implementation has the advantages of portability, flexibility and ease of use it provides a limited physical security as well as agility. When compared to the software implementation, the hardware implementation is having positive features like improvement in operating speed and security. The other advantages that lead to the hardware implementation are less power consumption, allocation of resources, re-configurability, architecture efficiency and cost efficiency. This paper presents a performance evaluation of two hardware models of RC5 algorithm. Evaluations will be used to determine the best hardware model for two different system requirements.
Keywords :
cryptography; field programmable gate arrays; system-on-chip; FPGA; RC5 algorithm; SoC; cryptography; data encryption; data transmission security; hardware model; performance evaluation; reconfigurability; resource allocation; Computer architecture; Costs; Cryptography; Data security; Design methodology; Energy consumption; Field programmable gate arrays; Hardware; Power system security; Resource management; Cryptography; FPGA; RC5; SoC;
Conference_Titel :
System Theory, 2007. SSST '07. Thirty-Ninth Southeastern Symposium on
Conference_Location :
Macon, GA
Print_ISBN :
1-4244-1126-2
Electronic_ISBN :
0094-2898
DOI :
10.1109/SSST.2007.352331
