DocumentCode :
2428181
Title :
Extending the viability of IDDQ testing in the deep submicron era
Author :
Tsiatouhas, Y. ; Haniotakis, Th ; Nicolos, D. ; Arapoyanni, A.
Author_Institution :
Adv. Silicon Solutions Div., ISD S.A., Athens, Greece
fYear :
2002
fDate :
2002
Firstpage :
100
Lastpage :
105
Abstract :
IDDQ testing has become a widely accepted defect detection technique in CMOS ICs. However, its effectiveness in deep submicron is threatened by the increased transistor sub-threshold leakage current. In this paper, a new IDDQ testing scheme is proposed. This scheme is based on the elimination, during IDDQ testing, of the normal leakage current from the sensing node of the circuit under test so that already known in the open literature IDDQ sensing techniques can be applied in deep submicron.
Keywords :
CMOS integrated circuits; fault location; integrated circuit testing; leakage currents; CMOS ICs; IDDQ testing scheme; IDDQ testing viability extension; defect detection technique; normal leakage current elimination; sensing node; transistor sub-threshold leakage current; CMOS technology; Circuit testing; Current measurement; Informatics; Leakage current; Power supplies; Silicon; Telecommunication computing; Temperature dependence; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2002. Proceedings. International Symposium on
Print_ISBN :
0-7695-1561-4
Type :
conf
DOI :
10.1109/ISQED.2002.996706
Filename :
996706
Link To Document :
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