Title :
Testing of analogue circuits via (standard) digital gates
Author :
De Venuto, D. ; Ohletz, M.J. ; Riccò, B.
Author_Institution :
DEE, Politecnico di Bari, Italy
Abstract :
The possibility of using window comparators for on-chip (and potentially on-line) response evaluation of analogue circuits is investigated. No additional analogue test inputs are required and the additional circuitry can be realised either by means of standard digital gates taken from an available library or by full custom designed gates to obtain an observation window tailored to the application. With this approach, the test overhead can be kept extremely low. Due to the low gate capacitance also the load on the observed nodes is very low. Simulation results for some examples show that 100% of all assumed layout-realistic faults could be detected.
Keywords :
analogue integrated circuits; capacitance; comparators (circuits); fault diagnosis; integrated circuit testing; analogue circuit testing; full custom designed gates; gate capacitance; layout-realistic faults; observation window; on-chip response evaluation; standard digital gates; test overhead; window comparators; Aerospace testing; Automotive engineering; Circuit testing; Costs; Design for testability; Digital integrated circuits; Logic gates; Proposals; Software libraries; Voltage;
Conference_Titel :
Quality Electronic Design, 2002. Proceedings. International Symposium on
Print_ISBN :
0-7695-1561-4
DOI :
10.1109/ISQED.2002.996709
