DocumentCode :
2429212
Title :
Scenario-Based Execution Method for Massively Parallel Accelerators
Author :
Yamagiwa, Shinichi ; Shixun Zhang
Author_Institution :
Dept. of Comput. Sci., Univ. of Tsukuba, Tsukuba, Japan
fYear :
2013
fDate :
16-18 July 2013
Firstpage :
1039
Lastpage :
1048
Abstract :
The manycore architecture has become one of the choices in the acceleration method of massively parallel computation. It is an unavoidable option for the top supercomputers in the world in order to achieve the high performance computing applying accelerators such as the graphics processing unit (GPU). However such accelerators are equipped on the processing nodes where the CPU cores control the accelerators via the peripheral bus. Therefore, even if the accelerator implements a large amount of parallelism, the performance is inevitably degraded due to the data migration overheads for downloading the kernel program to the accelerator and transferring the I/O data consumed by the program. To avoid the overheads, it is important to pack many tasks in a single kernel and to invoke it for the smallest numbers of execution times of the kernel programs. However, it is very difficult to pack it because it is necessary to exchange the I/O data in recursive operations or among different computing contents. In order to address this problem, the kernel program must invoke many different contents of the program at a single execution of the kernel program. This paper proposes a novel execution mechanism for the accelerators that drastically improves the performance, called the scenario-based execution for the accelerators. It exploits the potential performance of the accelerators, and the application invokes all program contents on the accelerator side. This paper discusses the design and implementation of the scenario-based execution method, and also the performance aspect using a realistic application.
Keywords :
field buses; graphics processing units; input-output programs; multiprocessing systems; operating system kernels; parallel machines; program control structures; CPU core control; I/O data; acceleration method; data migration; execution time; high performance computing; kernel program downloading; manycore architecture; massively parallel accelerator; peripheral bus; processing node; recursive operation; scenario-based execution method; supercomputer; Central Processing Unit; Computer architecture; Graphics processing units; Kernel; Libraries; Runtime; XML; CarSh; Caravela; GPU; Kernel merge; Manycore accelerator; Recursive application;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Trust, Security and Privacy in Computing and Communications (TrustCom), 2013 12th IEEE International Conference on
Conference_Location :
Melbourne, VIC
Type :
conf
DOI :
10.1109/TrustCom.2013.127
Filename :
6680947
Link To Document :
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