DocumentCode
2429229
Title
Necessity of pulse hot carrier evaluation in suppressing self-heating effect for SOI smart power
Author
Nitta, T. ; Yanagi, S. ; Igarashi, T. ; Hatasako, K. ; Maegawa, S. ; Furuya, K. ; Katayama, T.
Author_Institution
Renesas Technol. Corp., Itami, Japan
fYear
2009
fDate
14-18 June 2009
Firstpage
84
Lastpage
87
Abstract
Hot carrier (HC) reliability of SOI LDMOS suppressing self-heating effect was investigated. We evaluated an appropriate HC degradation by controlling junction temperature (Tj) within the temperature range the circuit is actually operated of. A gate pulse HC evaluation system was used to suppress the self-heating effect during HC stress. Pulse HC stress shows that the drain current shift is three times larger and the threshold voltage shift is 10 times smaller at Tj = 25degC than the shifts evaluated by means of DC stress. We find that pulse stress evaluation is essential when estimating degradations of actual circuit operating temperatures for SOI smart power. The degradation mechanism was also evaluated using a charge pumping measurement.
Keywords
MOS integrated circuits; hot carriers; power integrated circuits; reliability; silicon-on-insulator; SOI LDMOS suppressing self-heating effect; SOI smart power; charge pumping measurement; circuit operating temperatures; degradation mechanism; drain current shift; gate pulse; hot carrier reliability; junction temperature; pulse stress evaluation; temperature 25 degC; Charge pumps; Current measurement; Degradation; Hot carriers; Power system reliability; Pulse circuits; Stress; Temperature control; Temperature distribution; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on
Conference_Location
Barcelona
ISSN
1943-653X
Print_ISBN
978-1-4244-3525-8
Electronic_ISBN
1943-653X
Type
conf
DOI
10.1109/ISPSD.2009.5158007
Filename
5158007
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