A low power 900 MHz PLL frequency synthesizer for ISM applications using 0.25 μm BiCMOS

Author

Huehne, Karl ; Lovelace, David ; Ovalle, Pedro

Author_Institution

Motorola Inc., Tempe, AZ, USA

fYear

2000

fDate

2000

Abstract

MOS Current Mode Logic (CML) is featured on a 0.25 μm BiCMOS technology to implement a low noise, low power PLL operating to 1.2 GHz for portable wireless applications. It operates over 1.8 to 2.8 V and consumes 9.3 mA including the VCO. As part of a highly integrated two-chip transceiver system, full differential operation significantly reduces phase noise

Keywords

BiCMOS integrated circuits; UHF integrated circuits; current-mode logic; frequency synthesizers; integrated circuit noise; low-power electronics; mixed analogue-digital integrated circuits; mobile radio; phase locked loops; transceivers; 0.25 micron; 1.2 GHz; 1.8 to 2.8 V; 9.3 mA; 900 MHz; BiCMOS technology; ISM applications; MOS CML; MOS current mode logic; PLL frequency synthesizer; VCO; full differential operation; highly integrated transceiver system; low noise PLL; low power frequency synthesizer; mixed-mode ASIC; phase noise reduction; portable wireless applications; two-chip transceiver system; BiCMOS integrated circuits; CMOS logic circuits; Costs; Counting circuits; Frequency synthesizers; Noise reduction; Phase detection; Phase locked loops; Radio frequency; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Devices, Circuits and Systems, 2000. Proceedings of the 2000 Third IEEE International Caracas Conference on

Conference_Location

Cancun

Print_ISBN

0-7803-5766-3

Type

conf

DOI

10.1109/ICCDCS.2000.869806

Filename

869806