Title :
Improvement of the RF power performance of nLDMOSFETs on bulk and SOI substrates with ‘ribbon’ gate and source contacts layouts
Author :
Fournier, D. ; Ducatteau, D. ; Fontaine, J. ; Scheer, P. ; Bon, O. ; Rauber, B. ; Buczko, M. ; Gloria, D. ; Gaquière, C. ; Chevalier, P.
Author_Institution :
STMicroelectronics, Crolles, France
Abstract :
This paper presents the RF power performances of nLDMOSFETs fabricated on bulk and SOI substrates and the layout changes made to improve these performances. It is shown that simple design rules modifications can be done to increase fmax, by reducing the gate resistance, without penalizing fT. A significant improvement of both the output power Pout and the power added efficiency PAE is demonstrated in A and AB classes.
Keywords :
MOSFET; microwave transistors; RF power performance; SOI substrates; Si; bulk substrates; gate resistance; nLDMOSFET; power added efficiency; ribbon gate; source contacts layouts; CMOS process; CMOS technology; Gallium arsenide; Immune system; MOSFETs; Power amplifiers; Radio frequency; Silicon on insulator technology; Switches; Threshold voltage;
Conference_Titel :
Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on
Conference_Location :
Barcelona
Print_ISBN :
978-1-4244-3525-8
Electronic_ISBN :
1943-653X
DOI :
10.1109/ISPSD.2009.5158015