DocumentCode :
2429568
Title :
Practical parallel Fortran
Author :
Nelson, Bron ; Caruso, Deb
Author_Institution :
Silicon Graphics Inc., Mountain View, CA, USA
fYear :
1990
fDate :
Feb. 26 1990-March 2 1990
Firstpage :
624
Lastpage :
629
Abstract :
The implementation of the Silicon Graphics automatic parallelizing Fortran compiler is described. It consists of three major parts: the Power Fortran accelerator (PFA), which discovers the parallelism, the Power Fortran compiler, which implements the parallelism, and the run-time library, which handles the synchronization of the parallel processes. All three parts are outlined, and a few benchmark results are presented. The Silicon Graphics parallel Fortran System provides fully automatic parallelization, allowing even naive users to take advantage of the Power Series multiprocessors. The PFA is a source-to-source preprocessor that runs as a compiler pass. Once a loop has been labeled as parallel, either by hand or by PFA, the compiler must generate code for it. The loop is spooled out and compiled as if it were a local, nested procedure in the Pascal sense. The library of routines deals with the parallel execution of the spooled loop subrouting.<>
Keywords :
FORTRAN; parallel programming; program compilers; Power Fortran accelerator; Power Fortran compiler; Silicon Graphics; automatic parallelizing Fortran compiler; benchmark results; parallel Fortran System; parallel processes; parallelism; run-time library; synchronization; Data analysis; Graphics; Hardware; Libraries; Operating systems; Parallel processing; Silicon; Software systems; Solids; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compcon Spring '90. Intellectual Leverage. Digest of Papers. Thirty-Fifth IEEE Computer Society International Conference.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-2028-5
Type :
conf
DOI :
10.1109/CMPCON.1990.63751
Filename :
63751
Link To Document :
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