Bandwidth analysis of multibus parallel subnetworks

An analysis is presented of the bandwidth of parallel subnetworks of multiprocessor multibus systems in closed queuing networks. Past bandwidth analyses have used unit connection time between a processor and any shared-memory module, so no memory modules are accessed at the beginning of a memory cycle. This model uses arbitrary connection time and allows busy memory modules at the start of a memory cycle. A two-state arbitration scheme is used to handle memory and bus access conflicts. Numerical results are computed with some approximations. When unit connection time is specified, local access is disallowed, and the service demand time of a processor is fixed to zero, this model reduces to the models of past studies. The following performance measures are derived: bandwidth, bandwidth utilization, acceptance probability of requests, expected retrying time to access a shared memory module, and the number of processors in processing, accessing, and retrying states.<>