DocumentCode
2429912
Title
Power device stacking using surface bump connections
Author
Castellazzi, A. ; Mermet-Guyennet, M.
Author_Institution
Dept. of Electr. & Electron. Eng., Univ. of Nottingham, Nottingham, UK
fYear
2009
fDate
14-18 June 2009
Firstpage
204
Lastpage
207
Abstract
This work presents a novel integration approach for silicon power devices. Considering the very widespread half-bridge interconnection of IGBTs and anti-parallel freewheeling diodes, the first prototype development and testing of a vertically integrated switch is described. This original solution is enabled by the use of surface bumps as a replacement of bond-wires and it opens up new ways for optimum volume exploitation in power system design and also brings along double sided cooling capability and reduced stray inductance.
Keywords
bridge circuits; cooling; interconnections; power semiconductor diodes; power semiconductor switches; silicon; thermal management (packaging); IGBT; Si; antiparallel freewheeling diodes; bond-wires replacement; double sided chip cooling; functional prototypal half-bridge switch; half-bridge interconnection; integration approach; power system design; silicon power device stacking; stray inductance reduction; surface bump connections; vertically integrated switch; Bonding; Cooling; Diodes; Insulated gate bipolar transistors; Power system interconnection; Prototypes; Silicon; Stacking; Switches; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on
Conference_Location
Barcelona
ISSN
1943-653X
Print_ISBN
978-1-4244-3525-8
Electronic_ISBN
1943-653X
Type
conf
DOI
10.1109/ISPSD.2009.5158037
Filename
5158037
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