DocumentCode :
2430329
Title :
Future SoC design challenges and solutions
Author :
Chen, Charlie Chung-Ping ; Cheng, Ed
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
fYear :
2002
fDate :
2002
Firstpage :
534
Lastpage :
537
Abstract :
SoC (system on a chip) design creates tremendous design challenges to the traditional VLSI ASIC design. It covers not only the traditional DSM (deep sub-micron) issues but also the integration issues such as IP and signal integrity especially for integrated digital/analog system such as Bluetooth. Besides. power consumption and power delivery also impose huge design constraints to the already difficult situation especially for the portable and mobile devices. This talk will introduce and analysis the potential SoC issues and potential solutions from the architecture level to the circuit level.
Keywords :
VLSI; application specific integrated circuits; integrated circuit design; low-power electronics; mixed analogue-digital integrated circuits; ASIC design; IP; SoC design; SoC issues; VLSI; architecture level; circuit level; deep sub-micron issues; design constraints; integrated digital/analog system; mobile devices; portable devices; power consumption; power delivery; signal integrity; Clocks; Crosstalk; Delay; Frequency; Inductance; System-on-a-chip; Timing; Uncertainty; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2002. Proceedings. International Symposium on
Print_ISBN :
0-7695-1561-4
Type :
conf
DOI :
10.1109/ISQED.2002.996800
Filename :
996800
Link To Document :
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