Implicit design of a predictive PID controller with computational delay effect

A novel scheme for designing a discrete robust predictive PID controller considering computational delays is developed. The authors present an analysis of the concepts involved in designing both the predictor and control elements in such a manner as to make due allowance for the computational time associated within the PID algorithm in estimating the output of the controller at one or more sampling periods from the pivotal point. Simulation results on different process models make possible a comparison of the resultant robust controller with the normal predictive and standard PID controllers. The effect of the sampling periods on the step responses of the designed controller are considered. Numerical examples indicate that the proposed control scheme performed better than the conventional and other existing predictive PID structures for the representative process models