DocumentCode :
2430911
Title :
AVS video standard implementation for SoC design
Author :
Jin, Xin ; Li, Songnan ; Ngan, King Ngi
Author_Institution :
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Hong Kong
fYear :
2008
fDate :
7-11 June 2008
Firstpage :
660
Lastpage :
665
Abstract :
AVS1-P2 is the newest video standard of Audio Video coding Standard (AVS) workgroup of China, which provides close performance to H.264/AVC main profile with lower complexity. In this paper, a platform independent software package is developed for AVS1-P2 decoder to facilitate embedded video codec development. In order to minimize the on-chip memory and save the time consumed in on-chip/off-chip data transfer, an MB-based architecture is developed by modifying the data flow, decoding hierarchy, and the buffer definition and management for low-level decoding kernels. Such system architecture provides over 80% reduction in on-chip memory compared to the frame-based architecture when decoding 720 p (1280times720) sequences. By modularizing the decoding kernels and data transfer modules, the proposed MB-based decoder facilitates the AVS video decoder development on the target platform.
Keywords :
audio coding; digital signal processing chips; embedded systems; system-on-chip; video coding; AVS video standard; SoC design; audio video coding standard; decoding kernel module; embedded video codec; platform independent software package; Automatic voltage control; Computer architecture; Decoding; Filters; Kernel; Multimedia communication; Software packages; System-on-a-chip; Video codecs; Video coding; AVS video standard; MB-based architecture; video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks and Signal Processing, 2008 International Conference on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-2310-1
Electronic_ISBN :
978-1-4244-2311-8
Type :
conf
DOI :
10.1109/ICNNSP.2008.4590433
Filename :
4590433
Link To Document :
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