Design methodology for a block motion estimation IP core

The paper describes the design of a parameterizable core for motion estimation. Using a high level strategy targeted at memory requirements, a core has been developed for H.261, H.263 and MPEG-2 video compression standards which works efficiently across a range of search mechanisms, window sizes and error metrics. The core can perform motion estimation at up to 150 frame/s and performs well across the parameter range, demonstrating the design quality.