DocumentCode :
2431359
Title :
Analysis of SEU effects in partially reconfigurable SoPCs
Author :
Sterpone, L. ; Margaglia, F. ; Koester, Markus ; Hagemeyer, Jens ; Porrmann, Mario
Author_Institution :
DAUIN, Politec. di Torino, Torino, Italy
fYear :
2011
fDate :
6-9 June 2011
Firstpage :
129
Lastpage :
136
Abstract :
Systems on Programmable Chips (SoPCs) are receiving an increasing interest from various application domains. Safety critical missions, driven by space and avionics applications, are especially attracted in using SoPCs due to low non-recurring engineering costs, reconfigurability and the large number of logic resources they provide. The capability of partial reconfiguration has recently become a promising approach to enhance the flexibility of a given system and to adapt and customize to different requirements. However, Single Event Upsets (SEUs) induced by radiation environment where space and avionics system operate, have a critical and catastrophic effect in these devices. In this paper, we propose a novel algorithm, which is able to identify critical SEUs corrupting the functionality of a SoPC using dynamic and partial reconfiguration. The algorithm is based on an analyzer able to interact with the dynamic system components containing partial reconfiguration modules, the communication infrastructure and the static region. Efficient critical SEUs estimation depends not only on the independent component mapping but also on the routing interaction between reconfigurable modules placed in different feasible positions. The analysis algorithm has been proven on a partially reconfigurable platform using different applications, besides it has been validated by means of fault injection campaigns of SEUs into SoPC´s configuration memory. The experimental results demonstrated the effectiveness of the developed algorithm. Fault injection results have been accurately investigated and commented.
Keywords :
system-on-chip; SEU effect analysis; dynamic reconfiguration; fault injection campaigns; independent component mapping; partially reconfigurable SoPC platform; routing interaction; single event upsets; systems on programmable chips; Aerospace electronics; Algorithm design and analysis; Circuit faults; Field programmable gate arrays; Heuristic algorithms; Routing; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4577-0598-4
Electronic_ISBN :
978-1-4577-0597-7
Type :
conf
DOI :
10.1109/AHS.2011.5963926
Filename :
5963926
Link To Document :
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