DocumentCode :
2431815
Title :
An FPGA task allocator with preliminary First-Fit 2D packing algorithms
Author :
Hong, Chuan ; Benkrid, Khaled ; Iturbe, Xabier ; Erdogan, Ahmet T. ; Arslan, Tughrul
Author_Institution :
Univ. of Edinburgh, Edinburgh, UK
fYear :
2011
fDate :
6-9 June 2011
Firstpage :
264
Lastpage :
270
Abstract :
This paper presents a novel light footprint and fast execution allocator for dynamically placing hardware tasks onto partially-damaged and resource-limited FPGA chips. The aim of the allocator´s placement algorithm is to maximize the overall task acceptance rate in presence of spontaneously occurring faults in chip´s silicon. Towards this objective, a novel placement algorithm: Empty Area Compaction (EAC) with its preliminary version: First-Fit, is proposed. Additionally, a set of observations are presented, targeting on optimizing the algorithm and accelerating its execution time, in the case of two parameters: chip granularity and algorithm´s pipeline structure. Based on these, a First Fit allocator has been implemented on a low cost Xilinx PicoBlaze soft processor, accelerating the placement decision to be made within 10 μs.
Keywords :
field programmable gate arrays; integrated circuit modelling; integrated circuit packaging; logic design; FPGA chips; FPGA task allocator; Xilinx PicoBlaze soft processor; fast execution allocator; light footprint allocator; preliminary first-fit 2D packing algorithms; time 10 mus; Algorithm design and analysis; Field programmable gate arrays; Hardware; Radiation detectors; Resource management; Shape; Time factors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4577-0598-4
Electronic_ISBN :
978-1-4577-0597-7
Type :
conf
DOI :
10.1109/AHS.2011.5963946
Filename :
5963946
Link To Document :
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