Title :
Exploiting advanced fault localization methods for yield & reliability learning on SoCs
Author_Institution :
STMicroelectronics srl, Italy
Abstract :
This paper proposes advances on fault localization methods suiting the learning of yield and reliability in VLSI CMOS technologies. Industrial methodologies and tools will be discussed and the experimental results obtained through their implementation will be presented.
Keywords :
CMOS digital integrated circuits; VLSI; fault diagnosis; integrated circuit reliability; integrated circuit yield; system-on-chip; SoC reliability; SoC yield; VLSI CMOS technology; fault diagnosis; fault localization method; industrial methodology; Automatic test pattern generation; Automatic testing; CMOS technology; Circuit faults; Circuit testing; Failure analysis; Hardware; Instruments; Software testing; Space technology; Fault localization; diagnosis; yield and reliability;
Conference_Titel :
VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2781-9
Electronic_ISBN :
978-1-4244-2782-6
DOI :
10.1109/VDAT.2009.5158124
