DocumentCode :
2431989
Title :
Design of high-speed errors-and-erasures Reed-Solomon decoders for multi-mode applications
Author :
Lu, Yung-Kuei ; Shieh, Ming-Der ; Kuo, Wen-Hsuen
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng-Kung Univ., Tainan, Taiwan
fYear :
2009
fDate :
28-30 April 2009
Firstpage :
199
Lastpage :
202
Abstract :
A multi-mode Reed-Solomon (RS) decoder design based on the reformulated inversionless Berlekamp-Massey (riBM) algorithm is proposed to correct both errors and erasures for any RS code including shortened codes. Without degrading the resulting performance, we effectively improve the hardware utilization of decoder and simplify the routing network in conventional multi-mode decoder design. With the developed multi-mode arrangement, the proposed decoder possesses not only high-performance property but also simple and regular interconnect topology, making the decoder suitable for VLSI realization. Experimental results reveal that for code words of length n les 255 with nu errors and rho erasures correcting capability, 0les 2nu+rho les 16, the achievable throughput rate of the proposed decoder, implemented in TSMC 0.13mum 1P8M process, is 4Gbps at a maximum operating clock of 450MHz and the total gate count is 50K.
Keywords :
Reed-Solomon codes; error correction codes; high-speed techniques; high-speed errors-and-erasures Reed-Solomon decoders; multi-mode applications; reformulated inversionless Berlekamp-Massey algorithm; Algorithm design and analysis; Decoding; Degradation; Error correction codes; Hardware; Network topology; Reed-Solomon codes; Routing; Throughput; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2781-9
Electronic_ISBN :
978-1-4244-2782-6
Type :
conf
DOI :
10.1109/VDAT.2009.5158129
Filename :
5158129
Link To Document :
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