DocumentCode :
2432152
Title :
Implementation of 6-Port 3D transformer in injection-locked frequency divider
Author :
Jang, Sheng-Lyang ; Tai, Chia-Wei ; Liu, Cheng-Chen
Author_Institution :
Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei, Taiwan
fYear :
2009
fDate :
28-30 April 2009
Firstpage :
223
Lastpage :
226
Abstract :
This paper proposes a 6-port 3-dimensional (3-D) transformer used to improve the performance of injection-locked frequency divider (ILFD). The aim of the 3-D transformer is to reduce chip size and to reduce power consumption. The CMOS LC-tank ILFD is implemented using the direct injection nMOS between the differential outputs of an nMOS-core cross-coupled VCO. At the supply voltage of 0.6 V, the free-running frequency of ILFD is tunable from 4.81 GHz to 5.3 GHz. At the incident power of 0 dBm and VDD=0.6 V, the total locking range is about 3 GHz, from the incident frequency 8.9 to 11.9 GHz for the ILFD in the divide-by-2 mode. The core power consumption is 1.02 mW. The die area is 0.394 times 0.623 mm2.
Keywords :
CMOS integrated circuits; field effect MMIC; frequency dividers; microwave oscillators; transformers; voltage-controlled oscillators; 6-Port 3D transformer; CMOS LC-tank ILFD tuning; frequency 3 GHz; frequency 4.81 GHz to 5.3 GHz; frequency 8.9 GHz to 11.9 GHz; injection-locked frequency divider; nMOS-core cross-coupled VCO; power 1.02 mW; voltage 0.6 V; Circuits; Coils; Energy consumption; Frequency conversion; Inductance; Inductors; Phase noise; Q factor; Radio frequency; Voltage-controlled oscillators; CMOS; VCO; injection-locked frequency divider; locking range; stacked 3-dimensional transformer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2781-9
Electronic_ISBN :
978-1-4244-2782-6
Type :
conf
DOI :
10.1109/VDAT.2009.5158135
Filename :
5158135
Link To Document :
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