A high speed and low power voltage controlled ring oscillator for phase locked loop circuits

This paper presents the design of a high speed and low power voltage controlled ring oscillator. The proposed design is suitable for phase locked loop circuits. The ring oscillator operates at 5GHz and designed by 0.13 μm CMOS technology. Seven stages of inverters are built to construct the oscillator, forming 126 bit vectors. The frequency is controlled by a tri-state gate inverter, and the first inverter is exchanged by a NAND-gate to drive the oscillator to idle mode. The optimization design and layout are done using L-EDIT® software to make the oscillator as small as possible. In addition, H-spice and L-EDIT tools are used in the analysis and simulation to verify the predicted performance. The optimized ring oscillator is then compared with the previous design done by other researchers. It reveals that the ring oscillator is able to operate with 2V supply, occupying an area of about 0.42 × 1.29 mm² and consuming around 50.85 mW.