Efficient reconfiguration of WSI arrays

Author

Bhatia, Dinesh ; Leighton, Tom ; Makedon, Fillia

Author_Institution

Dept. of Comput. Sci., Texas Univ., Richardson, TX, USA

fYear

1990

fDate

23-26 Apr 1990

Firstpage

47

Lastpage

56

Abstract

A new technique for efficient reconfiguration of large VLSI arrays suitable for wafer-scale integration (WSI) is introduced. Under the common assumption of uniformly distributed faults, the VLSI arrays are reconstructed in polynomial time using a matching technique first introduced by F.T. Leighton and P.W. Shor (1986). In addition, a randomized method for reducing the maximum wire length and the total wire length is developed and it is shown experimentally that the technique performs better than previous methods

Keywords

VLSI; computer architecture; configuration management; VLSI arrays; WSI arrays; efficient reconfiguration; large VLSI arrays; matching technique; maximum wire length; polynomial time; randomized method; total wire length; uniformly distributed faults; wafer-scale integration; Aging; Assembly systems; Computer science; Contracts; Laboratories; Polynomials; Silicon; Very large scale integration; Wafer scale integration; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Systems Integration, 1990. Systems Integration '90., Proceedings of the First International Conference on

Conference_Location

Morristown, NJ

Print_ISBN

0-8186-9027-5

Type

conf

DOI

10.1109/ICSI.1990.138661

Filename

138661