Improvement in reliability by changing the deterministic inputs of nanoscale circuits

Author

Khalid, Usman ; Anwer, Jahanzeb ; Singh, Narinderjit ; Hamid, Nor H. ; Asirvadam, Vijanth S.

Author_Institution

Electr. & Electron. Eng. Dept., Univ. Teknol. PETRONAS (UTP), Bandar Seri Iskandar, Malaysia

fYear

2011

fDate

28-30 Sept. 2011

Firstpage

195

Lastpage

197

Abstract

Scaling of CMOS technology is degrading the reliability of upcoming microelectronic devices. When the circuit design enters the nanoscale dimensions, the inputs have more influence on the circuit´s reliability due to the circuit´s internal noises and gate errors. In this paper, we will model the deterministic inputs probabilistically and analyze their effect on the reliability of digital circuits. The analysis is based on the Bayesian networks error modelling scheme. The simulations are based on MATLAB and show the important relationships among different deterministic inputs and their reliabilities. The results show the range of reliability values obtained by changing the deterministic input probability values.

Keywords

CMOS integrated circuits; belief networks; integrated circuit reliability; nanoelectronics; Bayesian networks error modelling; CMOS technology; MATLAB; deterministic inputs; digital circuits; microelectronic devices; nanoscale circuits; reliability; Bayesian methods; Integrated circuit modeling; Integrated circuit reliability; Logic gates; Nanoscale devices; Reliability engineering; Bayesian networks; deterministic Inputs; reliability;

fLanguage

English

Publisher

ieee

Conference_Titel

Micro and Nanoelectronics (RSM), 2011 IEEE Regional Symposium on

Conference_Location

Kota Kinabalu

Print_ISBN

978-1-61284-844-0

Type

conf

DOI

10.1109/RSM.2011.6088322

Filename

6088322