DocumentCode
2432961
Title
Throughput improvement in semiconductor fabrication for 0.13μm technology
Author
Balakrishna, Puvaneswaran ; Chik, Mohd Azizi ; Ahmad, Ibrahim ; Mohamad, Bashir
Author_Institution
Silterra Malaysia Sdn Bhd, Univ. Tenaga Nasional, Kajang, Malaysia
fYear
2011
fDate
28-30 Sept. 2011
Firstpage
228
Lastpage
231
Abstract
Semiconductor fabrication is known to be the one of the most complex manufacturing operations. This is due to total processing steps in semiconductor fabrication is as high as 1000 steps and the process will re-enter through same equipments multiple times. This will always pose a challenge to the operational team to achieve goal for optimal cycle time and maximum output. One of the WIP (Work In Progress) management approach used to achieve this goal is to use the right WIP prioritization. In general, giving priority to respective WIP usually will result in faster cycle time to fulfill customer expectation. This is done by identifying specific products as priority 1 to be executed first and priority 2 next. The methodology in this research uses simulation software to configure a real 200mm semiconductor fabrication facility. The input parameters used in this analysis include technology product specification, products demand based on real market trend, manufacturing, and equipment specification and requirements. The results from this study re-instate that prioritization has direct impact to the overall product cycle time and monthly wafer output. The results in this study also shows that categorizing product into two types of priorities will improve the cycle time by 2.21% and monthly wafer output will increase by 2.1% compared to when the WIP were managed by the same priority. In conclusion, this is desirable because increasing 2.1% monthly output can easily contribute to increase revenue of more than USD 4 million per year, which is vital for company´s survival in this competitive business.
Keywords
digital simulation; electronic engineering computing; semiconductor industry; work in progress; WIP; complex manufacturing; products demand; semiconductor fabrication; simulation software; size 0.13 mum; technology product specification; work in progress management; Accuracy; Dispatching; Fabrication; Load modeling; Loading; Semiconductor device modeling; Cycle Time; Priority; Product Mixed; Silicon Wafer Manufacturing Plant (Fab); Simulation; Work In Progress (WIP);
fLanguage
English
Publisher
ieee
Conference_Titel
Micro and Nanoelectronics (RSM), 2011 IEEE Regional Symposium on
Conference_Location
Kota Kinabalu
Print_ISBN
978-1-61284-844-0
Type
conf
DOI
10.1109/RSM.2011.6088330
Filename
6088330
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