Despreading chip waveform design for coherent delay-locked tracking in DS/SS systems

In this paper, the effect of unmatched despreading chip waveforms for locally generated early and late despreading codes in a coherent delay-locked loop (CDLL) for DS/SS systems is investigated. Linear and nonlinear theories are employed to evaluate the performance of the CDLL. Based on linear theory, optimum despreading chip waveforms are pursued in the sense of minimizing root mean square (RMS) tracking error with both time limited (full response) and time unlimited constraints. Nonlinear analysis shows that the use of designed chip waveforms reduces RMS tracking error and increase mean time to lose lock (MTLL). Both rectangular and sinc chip pulse-shaping waveforms are considered as two widely used examples. It is also found that the designed despreading chip waveforms are optimized for any specified early-late spacing