Title :
FPGA based connected component labeling
Author :
Lee, Dae Ro ; Jin, Seung Hun ; Thien, Pham Cong ; Jeon, Jae Wook
Author_Institution :
Sungkyunkwan Univ., Suwon
Abstract :
Connected component labeling is very useful for separating object and background, and counting objects. The sequential processing architecture proposed by Von Neumann has limits in real-time processing when large data is treated. In this study, a connected component labeling system using parallel hardware architecture is implemented. This system is able to calculate over 200 frames per second (fps) and is labeled a maximum of 255 components. This is a stand-alone system that can receive input image data from a camera and display the resulting image through a monitor.
Keywords :
field programmable gate arrays; object detection; parallel architectures; FPGA; binary image; connected component labeling; parallel hardware architecture; real-time processing; Automatic control; Automation; Cameras; Communication system control; Control systems; Field programmable gate arrays; Hardware; Image processing; Labeling; Parallel processing; Connected Component Labeling; FPGA; Parallel Architecture; Real-time;
Conference_Titel :
Control, Automation and Systems, 2007. ICCAS '07. International Conference on
Conference_Location :
Seoul
Print_ISBN :
978-89-950038-6-2
Electronic_ISBN :
978-89-950038-6-2
DOI :
10.1109/ICCAS.2007.4406746