DocumentCode :
2433264
Title :
High performance automatic gain control circuit using a S/H peak-detector for ASK receiver
Author :
Chow, Hwang-Cherng ; Wang, I-Hsin
Author_Institution :
Dept. of Electr. Eng., Chang Gung Univ., Taiwan
Volume :
2
fYear :
2002
fDate :
2002
Firstpage :
429
Abstract :
A high performance automatic gain control (AGC) circuit is proposed in this paper. The proposed AGC incorporates a modified sample and hold peak-detector. Circuit operation of this new peak-detector demonstrates superior performance to the conventional one, by keeping and tracking the peak of the input signal at the same time. In addition, the design complexity of the proposed AGC is reduced in both the low pass filter and the demodulator due to the modified peak-detector. Based on simulation results, the complete AGC loop shows very satisfactory circuit operation. Therefore, it is suitable for high performance communication applications such as ASK (amplitude shift keyed) receivers.
Keywords :
CMOS integrated circuits; SPICE; amplitude shift keying; automatic gain control; circuit simulation; demodulators; integrated circuit design; integrated circuit modelling; low-pass filters; peak detectors; receivers; sample and hold circuits; 860 kHz; AGC loops; ASK receiver applications; CMOS high performance AGC; Hspice simulations; S/H peak-detectors; amplitude shift keyed receivers; automatic gain control circuits; communication applications; demodulators; input signal tracking; low pass filters; sample and hold peak-detectors; Amplitude shift keying; CMOS image sensors; Circuit simulation; Demodulation; Digital circuits; Digital control; Dynamic range; Gain control; Low pass filters; Wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN :
0-7803-7596-3
Type :
conf
DOI :
10.1109/ICECS.2002.1046186
Filename :
1046186
Link To Document :
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