DocumentCode
2434409
Title
Building asynchronous routers with independent sub-channels
Author
Song, Wei ; Edwards, Doug
Author_Institution
Sch. of Comput. Sci., Univ. of Manchester, Manchester, UK
fYear
2009
fDate
5-7 Oct. 2009
Abstract
Network-on-chip (NoC) has been used as the new on-chip communication paradigm. Asynchronous NoCs are power efficient and robust to process variation but they are slow. One reason for the low speed is the way that asynchronous routers use to build wide channels. To meet the bandwidth requirement, current routers broaden their channels by synchronizing multiple sub-channels. The C-element and buffer trees introduced by the synchronization increase the cycle period. A new router is proposed to use multiple independent sub-channels to transmit data. Since the synchronization is removed, the cycle period of all sub-channels are reduced speeding up the network. Two routers, one using multiple independent sub-channels and one using the synchronized wide channel, are implemented at the layout level. The simulation results show that the new router using multiple independent sub-channels reduces the router latency and the cycle period.
Keywords
buffer circuits; integrated circuit layout; network-on-chip; C-element; asynchronous routers; buffer trees; independent sub-channels; layout level; network-on-chip; on-chip communication paradigm; router latency; Asynchronous circuits; Bandwidth; Circuit simulation; Clocks; Delay; Electronic design automation and methodology; Network-on-a-chip; Protocols; Synchronization; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2009. SOC 2009. International Symposium on
Conference_Location
Tampere
Print_ISBN
978-1-4244-4465-6
Electronic_ISBN
978-1-4244-4467-0
Type
conf
DOI
10.1109/SOCC.2009.5335680
Filename
5335680
Link To Document