• DocumentCode
    2435777
  • Title

    Evaluation of self-heating in SOI CMOS ULSI

  • Author

    Dallmann, Douglas A. ; Shenai, Krishna

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
  • fYear
    1994
  • fDate
    16-19 Oct 1994
  • Firstpage
    83
  • Lastpage
    89
  • Abstract
    SOI technology potentially offers numerous benefits over bulk silicon at deep submicron dimensions. However, the presence of a buried SiO2 layer causes self-heating to occur which can impair device performance. The effects of self-heating on SOI MOSFET performance are examined as device dimensions are scaled from 1.0 μm to 0.25 μm. Results show severe self-heating under static conditions which has implications for IC reliability issues
  • Keywords
    CMOS integrated circuits; ULSI; integrated circuit reliability; silicon-on-insulator; 0.25 to 1.0 micron; IC reliability; SOI CMOS ULSI; SOI MOSFET; Si-SiO2; buried SiO2 layer; deep submicron technology; self-heating; CMOS technology; Equations; Frequency; Heating; Isolation technology; Metallization; Silicon compounds; Temperature; Thermal conductivity; Ultra large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop, 1994. Final Report., 1994 International
  • Conference_Location
    Lake Tahoe, CA
  • Print_ISBN
    0-7803-1908-7
  • Type

    conf

  • DOI
    10.1109/IRWS.1994.515832
  • Filename
    515832
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2435777