DocumentCode
2435848
Title
An adaptive sequential prefetching scheme in shared-memory multiprocessors
Author
Tcheun, Myoung Kwon ; Yoon, Hyunsoo ; Maeng, Seung Ryoul
Author_Institution
Dept. of Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
fYear
1997
fDate
11-15 Aug 1997
Firstpage
306
Lastpage
313
Abstract
The sequential prefetching scheme is a simple hardware controlled scheme, which exploits the sequentiality of memory accesses to predict which blocks will be read in the near future. We analyze the relationship between the sequentiality of application programs and the effectiveness of sequential prefetching on shared-memory multiprocessors. Also, we propose a simple hardware scheme which selects the prefetching degree on each miss by adding a small table (PDS: Prefetching Degree Selector) to the sequential prefetching scheme. This scheme could prefetch consecutive blocks aggressively for applications with high sequentiality and conservatively for applications with low sequentiality
Keywords
application generators; performance evaluation; processor scheduling; shared memory systems; adaptive sequential prefetching scheme; application programs; hardware controlled scheme; high sequentiality; memory accesses; sequentiality; shared-memory multiprocessors; Bandwidth; Computer science; Concurrent computing; Delay; Hardware; Lapping; Large-scale systems; Performance analysis; Prefetching; Software performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 1997., Proceedings of the 1997 International Conference on
Conference_Location
Bloomington, IL
ISSN
0190-3918
Print_ISBN
0-8186-8108-X
Type
conf
DOI
10.1109/ICPP.1997.622660
Filename
622660
Link To Document