• DocumentCode
    2436599
  • Title

    Towards an ESL design framework for adaptive and fault-tolerant MPSoCs: MADNESS or not?

  • Author

    Cannella, Emanuele ; Gregorio, Lorenzo Di ; Fiorin, Leandro ; Lindwer, Menno ; Meloni, Paolo ; Neugebauer, Olaf ; Pimentel, Andy

  • Author_Institution
    Leiden Inst. of Adv. Comput. Sci., Leiden Univ., Leiden, Netherlands
  • fYear
    2011
  • fDate
    13-14 Oct. 2011
  • Firstpage
    120
  • Lastpage
    129
  • Abstract
    The MADNESS project aims at the definition of innovative system-level design methodologies for embedded MP-SoCs, extending the classic concept of design space exploration in multi-application domains to cope with high heterogeneity, technology scaling and system reliability. The main goal of the project is to provide a framework able to guide designers and researchers to the optimal composition of embedded MPSoC architectures, according to the requirements and the features of a given target application field. The proposed approach will tackle the new challenges, related to both architecture and design methodologies, arising with the technology scaling, the system reliability and the ever-growing computational needs of modern applications. The methodologies proposed with this project act at different levels of the design flow, enhancing the state-of-the art with novel features in system-level synthesis, architectural evaluation and prototyping. Support for fault resilience and efficient adaptive runtime management is introduced at hardware and middleware level, and considered by the system-level synthesis as one of the optimization factors to be taken into account. This paper presents the first stable results obtained in the MADNESS project, already demonstrating the effectiveness of the proposed methods.
  • Keywords
    fault tolerance; integrated circuit reliability; middleware; multiprocessing systems; network synthesis; system-on-chip; ESL design framework; MADNESS project; adaptive MPSoC; adaptive runtime management; embedded MPSoC architectures; fault resilience; fault tolerant MPSoC; middleware; system level design methodologies; system level synthesis; system reliability; Computer architecture; Emulation; Fault tolerance; Field programmable gate arrays; Hardware; Libraries; Program processors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Embedded Systems for Real-Time Multimedia (ESTIMedia), 2011 9th IEEE Symposium on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4577-2123-6
  • Type

    conf

  • DOI
    10.1109/ESTIMedia.2011.6088518
  • Filename
    6088518