• DocumentCode
    2436680
  • Title

    Analysis of twiddle factor memory complexity of radix-2i pipelined FFTs

  • Author

    Qureshi, Fahad ; Gustafsson, Oscar

  • Author_Institution
    Dept. of Electr. Eng., Linkoping Univ., Linkoping, Sweden
  • fYear
    2009
  • fDate
    1-4 Nov. 2009
  • Firstpage
    217
  • Lastpage
    220
  • Abstract
    In this work, we analyze different approaches to store the coefficient twiddle factors for different stages of pipelined Fast Fourier Transforms (FFTs). The analysis is based on complexity comparisons of different algorithms when implemented on Field-Programmable Gate Arrays (FPGAs) and ASIC for different radix-2i algorithms. The objective of this work is to investigate the best possible combination for storing the coefficient twiddle factor for each stage of the pipelined FFT.
  • Keywords
    application specific integrated circuits; fast Fourier transforms; field programmable gate arrays; pipeline arithmetic; ASIC; Radix-2i pipelined FFT; fast Fourier transforms; field programmable gate arrays; twiddle factor memory complexity; Arithmetic; Computer architecture; Discrete Fourier transforms; Fast Fourier transforms; Field programmable gate arrays; Flexible printed circuits; Memory architecture; Multiplexing; Pipelines; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2009 Conference Record of the Forty-Third Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA
  • ISSN
    1058-6393
  • Print_ISBN
    978-1-4244-5825-7
  • Type

    conf

  • DOI
    10.1109/ACSSC.2009.5470121
  • Filename
    5470121
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2436680