Mismatch optimization for analog circuits using the DesignAssistant

Author

Kleine, U. ; Zhang, L. ; Wolf, M.

Author_Institution

Otto-von-Guericke Univ. of Magdeburg, Germany

Volume

3

fYear

2002

fDate

2002

Firstpage

1135

Abstract

This paper presents a new mismatch optimization feature of the DesignAssistant (DA), which is a part of the ALADIN (Automatic Layout Design Aid for Analog Integrated Circuits) program package. This interactive tool is integrated into a commercial design framework and supports analog designers during circuit design. The matching of two circuit elements can be calculated numerically in the design environment using the standard deviation of electrical parameters and simplified device models. The matching of the devices is estimated in accordance with their orientation and their surrounding layout. These features ease the design and improve the quality and reliability of analog integrated circuits.

Keywords

analogue integrated circuits; circuit layout CAD; circuit optimisation; integrated circuit layout; integrated circuit modelling; integrated circuit reliability; network parameters; ALADIN; Automatic Layout Design Aid for Analog Integrated Circuits; DesignAssistant; analog circuits; circuit design; commercial design framework; device models; electrical parameters; mismatch optimization; orientation; quality; reliability; Analog circuits; Analog integrated circuits; Circuit simulation; Circuit synthesis; Circuit topology; Design optimization; Integrated circuit synthesis; Libraries; MOSFETs; Packaging;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2002. 9th International Conference on

Print_ISBN

0-7803-7596-3

Type

conf

DOI

10.1109/ICECS.2002.1046452

Filename

1046452