Author :
Roy, Didier ; Ghosal, P. ; Mohanty, S.P.
Abstract :
The high integration density interconnects, closerproximity of modules, and the routing phase are pivotal during the layout of 3D ICs. Heuristic based approaches are typically used to handle such NP complete problems of global routing in 3D ICs. To overcome the inherent limitations of deterministic approaches a novel methodology for multi-objective global routing based on fuzzy logic has been proposed in this paper. The guiding information generated after the placement phase is used during routing with the help of a Fuzzy Expert System to achieve thermal efficient and congestion free routing. A complete global routing solution is designed based on the proposed algorithms and the results are compared with selected fully-established global routers viz. Labyrinth, FastRoute3.0, NTHU-R, BoxRouter 2.0, and FGR. Experiments are performed over ISPD benchmarks. The proposed router called FuzzRoute achieves balanced superiority in terms of routability, runtime, and wirelength over others. The improvements on routing time for Labyrinth, BoxRouter 2.0, and FGR are 91.81%, 86.87%, and 32.16%, respectively. It may be noted that though FastRoute3.0 achieves fastest runtime, it fails to generate congestion free solutions for all benchmarks, which is overcome by the proposed FuzzRoute of the current paper. FuzzRoute also shows wirelength improvements of 17.35%, 2.88%, 2.44%, 2.83%, and 2.10% respectively over others.
Keywords :
fuzzy logic; fuzzy systems; integrated circuit layout; network routing; three-dimensional integrated circuits; 3D ICs; BoxRouter 2.0; FGR; FastRoute3.0; FuzzRoute; ISPD benchmarks; Labyrinth; NTHU-R; fuzzy expert system; fuzzy logic; multiobjective global routing; routability; runtime; thermally efficient congestion free global routing; wirelength; Benchmark testing; Expert systems; Fuzzy sets; Pragmatics; Routing; Sensitivity; Three-dimensional displays; 3D Global Routing; 3D Integrated Circuits; Fuzzified Global Routing; Fuzzy Expert System; VLSI Layout Design;