DocumentCode
2439067
Title
Benchmarking diagnosis algorithms with a diverse set of IC deformations
Author
Vogels, T. ; Zanon, T. ; Desineni, R. ; Blanton, R.D. ; Maly, W. ; Brown, J.G. ; Nelson, J.E. ; Fei, Y. ; Huang, X. ; Gopalakrishnan, P. ; Mishra, M. ; Rovner, V. ; Tiwary, S.
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2004
fDate
26-28 Oct. 2004
Firstpage
508
Lastpage
517
Abstract
Diagnosis algorithms for integrated circuits (ICs) are typically developed and evaluated using a limited number of logic-level models of defect behaviors. However, it is well-known that real IC defects exhibit behavior well outside these models. Consequently, the utility of IC diagnosis methodologies may be uncertain. A simulation-based benchmarking strategy is developed that uses circuit-level models to describe the complex nature of real defects. Specifically, we have proposed a simple yet powerful strategy using a small circuit and a set of bounded deformations (i.e., defects) for measuring the effectiveness of diagnosis techniques. Evaluation of several simple and commercial diagnosis algorithms indicates that this form of diagnosis benchmarking is viable.
Keywords
benchmark testing; circuit simulation; fault simulation; integrated circuit testing; IC defect behaviors; IC deformations; IC diagnosis methodology; benchmarking diagnosis algorithms; bounded deformations; circuit level models; integrated circuits; logic level models; simulation based benchmarking strategy; Circuit simulation; Failure analysis; Fault detection; Fault diagnosis; Inspection; Integrated circuit interconnections; Integrated circuit modeling; Integrated circuit testing; Logic testing; Manufacturing industries;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2004. Proceedings. ITC 2004. International
Print_ISBN
0-7803-8580-2
Type
conf
DOI
10.1109/TEST.2004.1386987
Filename
1386987
Link To Document