• DocumentCode
    2439253
  • Title

    High-Level System Modeling for Rapid HW/SW Architecture Exploration

  • Author

    Jaber, Chafic ; Kanstein, Andreas ; Apvrille, Ludovic ; Baghdadi, Amer ; Le Moenner, P. ; Pacalet, Renaud

  • Author_Institution
    Freescale Semicond., Toulouse, France
  • fYear
    2009
  • fDate
    23-26 June 2009
  • Firstpage
    88
  • Lastpage
    94
  • Abstract
    The increasing complexity of system-on-chip design - especially the software part of those systems - has stimulated much research work on design space exploration at the early stages of system development. In this paper we propose a new methodology for system modeling based on a specific UML profile. It defines a high design abstraction level for modeling and analyzing hardware resource sharing between system elements. Additionally, a SystemC-based simulator is developed in order to simulate modeled systems and evaluate their performance. Due to the high level of abstraction, the developed simulator enables fast exploration of design solutions. First promising results are presented and discussed over a mobile platform for the 3GPP LTE protocol stack.
  • Keywords
    Unified Modeling Language; software architecture; system-on-chip; 3GPP LTE protocol stack; HW/SW architecture exploration; SystemC-based simulator; UML; design space exploration; hardware resource sharing; high-level system modeling; system modeling; system-on-chip design; Application software; Automatic testing; Computer architecture; Design automation; Europe; Modeling; Programming; Software prototyping; Telecommunications; Virtual prototyping;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Rapid System Prototyping, 2009. RSP '09. IEEE/IFIP International Symposium on
  • Conference_Location
    Paris
  • ISSN
    1074-6005
  • Print_ISBN
    978-0-7695-3690-3
  • Type

    conf

  • DOI
    10.1109/RSP.2009.27
  • Filename
    5158504