Title :
On random pattern generation with the selfish gene algorithm for testing digital sequential circuits
Author :
Zhang, Junwu ; Bushnell, Michael L. ; Agrawal, Vishwani D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA
Abstract :
A selfish gene (SG) algorithm differs from the genetic algorithm (GA) because it evolves genes (characteristics) that provide higher fitness rather than evolving individuals with higher fitness. We enhance the spectral method of sequential circuit test generation by using a SG algorithm. The objects of evolution are the Hadamard spectral matrix, non-linear digital signal processing (DSP) filtering cutoff values, vector holding time, and relative input phase shifts, which are all modeled as genes. These characteristics, extracted from compacted test vectors, are used to create new vector sequences to be further compacted with higher fault coverage. Alternatively, new vectors were generated by holding randomly selected vectors and then randomly perturbing some bits in 8-bit chunks of bit streams. Both the SG algorithm and holding with bit-perturbation can outperform the previously-published spectral method in either fault coverage, or shorter vector length, or both. The SG algorithm is often superior to random bit-perturbation but it requires more CPU time.
Keywords :
Hadamard matrices; automatic test pattern generation; circuit testing; digital circuits; digital signals; logic testing; sequential circuits; signal processing; 8-bit chunks; CPU time; DSP filtering cutoff values; Hadamard spectral matrix; digital sequential circuit testing; fault coverage; genetic algorithm; nonlinear digital signal processing; random bit perturbation; random pattern generation; relative input phase shifts; selfish gene algorithm; sequential circuit test generation; spectral method; vector holding time; vector sequences; Automatic testing; Circuit faults; Circuit testing; Digital filters; Digital signal processing; Genetic algorithms; Sequential analysis; Sequential circuits; Signal processing algorithms; Test pattern generators;
Conference_Titel :
Test Conference, 2004. Proceedings. ITC 2004. International
Print_ISBN :
0-7803-8580-2
DOI :
10.1109/TEST.2004.1386999